Astera Labs Advances CXL Technology Ecosystem with Fourth Generation

SANTA CLARA, Calif., Nov. 10, 2022 (GLOBE NEWSWIRE) — Astera Labs, a pioneer in dedicated connectivity solutions for intelligent and accelerated systems, today announced a partnership with AMD to deliver 4th First-generation AMD EPYC processors deliver on the promise of Compute Express Link™ (CXL). Astera Labs is helping OEMs and hyperscale customers deploy CXL at scale and realize the benefits of memory expansion, improved memory utilization, and lower total cost of ownership (TCO).

Astera Labs’ Leo Memory Connectivity Platform is the industry’s first memory controller to support memory scaling, pooling and sharing for CXL 1.1 and 2.0 CPUs. The Leo Smart Memory Controller and Aries Smart CXL Retimers are designed to seamlessly interoperate with AMD EPYC 9004 series processors to enable plug-and-play connectivity in new composable and heterogeneous architectures powered by CXL technology.

AMD has a long history of x86 firsts, innovation in 4th A generation of AMD EPYC (Xiaolong) processors. AMD EPYC 9004 series processors introduce support for high-performance DDR5 DIMMs and fast PCIe 5.0 I/O to meet the demands of today’s AI and ML applications and the increasing use of accelerators, GPUs, FPGAs, and more. In addition, these processors support CXL 1.1+ memory expansion to help meet the need for larger memory workload capacity. Combine 4th gen AMD EPYC processors and Astera Labs’ Leo Smart Memory Controller, can also support memory pools to reduce memory stranded.

Sanjay Gajendra, Chief Commercial Officer of Astera Labs, said, “Our Leo Memory Connectivity Platform and Aries Smart Retimer for CXL are purpose-built, low-latency, high-bandwidth architectures for AI/ML workloads and in-memory database applications for cloud-scale deployments. We value A strategic partnership with AMD as we work together to deliver high performance and reliable CXL solutions to our mutual customers and continue to innovate and meet future data center needs.”

Ram Peddibhotla, corporate vice president of product management at AMD EPYC, said: “4th Gen AMD EPYC processors continue to raise the bar for modern data center workload performance. Technologies such as 4th Gen AMD EPYC processors supporting CXL 1.1+ and Astera Labs’ Leo Smart Memory Controller will transform our customers’ performance by reducing memory bandwidth and capacity bottlenecks, reducing total cost of ownership and helping businesses address their sustainability concerns. Data center operational goals. “

View CXL Memory Expansion at SC’22
Astera Labs and AMD will demonstrate the CXL memory expansion at SC’22 at the CXL Alliance booth #2838 in Dallas, Texas, November 13-18. Attendees will learn how Leo overcomes processor memory bottlenecks and capacity constraints to improve performance and reduce TCO for applications ranging from artificial intelligence and machine learning to in-memory databases. To meet with Astera Labs’ memory connectivity experts at SC’22, please email


About Astera Labs
Astera Labs Inc. is a leader in dedicated data and memory connectivity solutions designed to eliminate performance bottlenecks across the data center. The company’s silicon, software and system-level connectivity solutions are globally distributed, helping realize the vision of artificial intelligence and machine learning in the cloud through CXL™, PCIe® and Ethernet technologies. For more information about Astera Labs, including open positions, please visit

AMD, the AMD Arrow logo, EPYC and combinations thereof are trademarks of Advanced Micro Devices, Inc. Other names are for informational purposes only and may be trademarks of their respective owners.

touch: Lori Zielinski

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